A control flow graph may be a data structure abstracting control flow behavior of executable program code. Nodes of the control flow graph may be basic blocks thereof and edges/paths may represent prospective transfer of control flow from one node to another. For example, the program code may be executed on parallel hardware architecture (e.g., NVIDIA®'s Compute Unified Device Architecture (CUDA®)) including a processor, where performance may be determined by the parallelism involved in executing a number of program threads simultaneously thereon. For maximum efficiency, all program threads may have to execute the same program code.
However, one or more nodes of the control flow graph may have divergent conditions associated therewith. In other words, the aforementioned one or more nodes may abstract creation of separate program threads that may compromise on the parallelism offered during execution of the program code on the processor.